This invention relates to a carrier phase synchronizing circuit for use in a receiver for receiving a quadrature amplitude modulated signal as a received signal.
In general, a receiver of the type described is supplied through a transmission path with a quadrature amplitude modulated signal as a received signal. The quadrature amplitude modulated signal is specified by a plurality of signal points on a phase plane. The phase plane has an origin and real and imaginary axes orthogonally crossing at the origin. The signal points are in one-to-one correspondence to a plurality of signal values. In the quadrature amplitude modulated signal, a carrier carries a transmission data signal representative of a variable which is equal to one of the signal values at a time. It is therefore possible to understand that the quadrature amplitude modulated signal carries the transmission data signal.
The received signal is subjected to distortion by fading or the like. The receiver comprises a demodulator for demodulating the received signal into a demodulated signal which comprises an in-phase baseband signal and a quadrature baseband signal. The demodulated signal is supplied to an equalizer. Responsive to the demodulated signal, the equalizer equalizes the fading distortion to produce an equalized signal. The equalized signal is supplied to a carrier phase synchronizing circuit. Responsive to the equalized signal, the carrier phase synchronizing circuit establishes carrier phase synchronization. The demodulated signal may be directly supplied to the carrier phase synchronizing circuit without passage of the demodulated signal through the equalizer. The carrier phase synchronizing circuit is implemented by a phase lock loop (PLL). A known carrier phase synchronizing circuit establishes the carrier phase synchronization by phase-rotating the equalized signal so that a carrier phase estimated error value becomes zero. More specifically, the known carrier phase synchronizing circuit comprises a phase rotating circuit for phase rotating the equalized signal on the phase plane around the origin in response to a control signal to produce a phase-rotated signal indicative of a phase-rotated value, a carrier phase extracting circuit for carrying out a predetermined extracting operation on the phase-rotated signal to produce a carrier phase error estimation signal indicative of the carrier phase estimated error value which is equal to a difference between the variable and the phase-rotated value, and a low-pass filter for carrying out a low-pass filtering operation on the carrier phase error estimation signal to produce the control signal.
It should be noted that the carrier phase estimated error value is not always equal to the difference. That is, the carrier phase estimated error value is equal to the difference only when the difference is present within a synchronization establishing phase range equal to a range in which the carrier phase extracting circuit can exactly extract the carrier phase estimated error value as the difference. The synchronization establishing phase range is, for example, between about plus three degrees and minus three degrees. When the difference exceeds a range which is twice the synchronization establishing phase range, the carrier phase estimated error value becomes very small. Under the circumstances, the known carrier phase synchronizing circuit consumes a long time in recovering the carrier phase synchronization.